Back Layout Versus Schematic Catalan Layout Versus Schematic German جانمایی درمقابل طرحواره Persian Logiciel de vérification de schéma French Layout versus schematic Japanese Leiaute Versus Esquemático Portuguese 电路布局验证 WUU 電路佈局驗證 Chinese
The layout versus schematic (LVS) is the class of electronic design automation (EDA) verification software that determines whether a particular integrated circuit layout corresponds to the original schematic or circuit diagram of the design.
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