Designer | IBM |
---|---|
Bits | 64-bit |
Introduced | 2000 |
Version | ARCHLVL 2 and ARCHLVL 3 (2008) |
Design | CISC |
Type | Register–Register Register–Memory Memory–Memory |
Encoding | Variable (2, 4 or 6 bytes long) |
Branching | Condition code, indexing, counting |
Endianness | Big |
Predecessor | ESA/390 |
Registers | |
Access 16× 32, breaking-event-address register (BEAR) 64-bit, Control 16×64, Floating Point Control 32-bit, Prefix 64 bit, PSW 128-bit | |
General-purpose | 16× 64-bit |
Floating point | 16× 64-bit |
Vector | 32× 128-bit, VR0-VR15 contain FPR0-FPR15 |
History of IBM mainframes, 1952–present |
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Market name |
Architecture |
z/Architecture, initially and briefly called ESA Modal Extensions (ESAME), is IBM's 64-bit complex instruction set computer (CISC) instruction set architecture, implemented by its mainframe computers. IBM introduced its first z/Architecture-based system, the z900, in late 2000.[1] Later z/Architecture systems include the IBM z800, z990, z890, System z9, System z10, zEnterprise 196, zEnterprise 114, zEC12, zBC12, z13, z14, z15 and z16.
z/Architecture retains backward compatibility with previous 32-bit-data/31-bit-addressing architecture ESA/390 and its predecessors back to the 32-bit-data/24-bit-addressing System/360. The IBM z13 is the last z Systems server to support running an operating system in ESA/390 architecture mode.[2] However, all 24-bit and 31-bit problem-state application programs originally written to run on the ESA/390 architecture will be unaffected by this change.
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