Dennard scaling

In semiconductor electronics, Dennard scaling, also known as MOSFET scaling, is a scaling law which states roughly that, as transistors get smaller, their power density stays constant, so that the power use stays in proportion with area; both voltage and current scale (downward) with length.[1][2] The law, originally formulated for MOSFETs, is based on a 1974 paper co-authored by Robert H. Dennard, after whom it is named.[3]

  1. ^ McMenamin, Adrian (April 15, 2013). "The end of Dennard scaling". Retrieved January 23, 2014.
  2. ^ Streetman, Ben G.; Banerjee, Sanjay Kumar (2016). Solid state electronic devices. Boston: Pearson. p. 341. ISBN 978-1-292-06055-2. OCLC 908999844.
  3. ^ Dennard, Robert H.; Gaensslen, Fritz; Yu, Hwa-Nien; Rideout, Leo; Bassous, Ernest; LeBlanc, Andre (October 1974). "Design of ion-implanted MOSFET's with very small physical dimensions". IEEE Journal of Solid-State Circuits. SC-9 (5): 256–268. Bibcode:1974IJSSC...9..256D. doi:10.1109/JSSC.1974.1050511. S2CID 283984.
    Dennard, R.H.; Gaensslen, F.H.; Hwa-Nien Yu; Rideout, V.L.; Bassous, E.; Leblanc, A.R. (April 1999). "Classic Paper: Design Of Ion-implanted MOSFET's with Very Small Physical Dimensions". Proceedings of the IEEE. 87 (4): 668–678. CiteSeerX 10.1.1.334.2417. doi:10.1109/JPROC.1999.752522. S2CID 62193402.

© MMXXIII Rich X Search. We shall prevail. All rights reserved. Rich X Search