General information | |
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Launched | 1997 |
Marketed by | Airbus Defence and Space |
Designed by | Sun Microsystems (acquired by Oracle Corporation) (instruction set, original design[clarification needed]) European Space Agency (ESA) Gaisler Research (processor, design derivative[clarification needed]) |
Common manufacturer |
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Performance | |
Max. CPU clock rate | 150 MHz[1] to 1500 MHz[2] |
Architecture and classification | |
Instruction set | SPARC V8 |
Physical specifications | |
Cores |
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History | |
Predecessor | ERC32 |
LEON (from Spanish: león meaning lion) is a radiation-tolerant 32-bit central processing unit (CPU) microprocessor core that implements the SPARC V8 instruction set architecture (ISA) developed by Sun Microsystems. It was originally designed by the European Space Research and Technology Centre (ESTEC), part of the European Space Agency (ESA), without any involvement by Sun. Later versions have been designed by Gaisler Research, under a variety of owners. It is described in synthesizable VHSIC Hardware Description Language (VHDL). LEON has a dual license model: An GNU Lesser General Public License (LGPL) and GNU General Public License (GPL) free and open-source software (FOSS) license that can be used without licensing fee, or a proprietary license that can be purchased for integration in a proprietary product.[3][4] The core is configurable through VHDL generics, and is used in system on a chip (SOC) designs both in research and commercial settings.[5]
Up to 150 MHz in FPGA and 1500 MHz on 32 nm ASIC
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