AArch64

ARM *AArch64* (64/32-bit)
Introduced	2011
Version	ARMv8-R, ARMv8-A, ARMv8.1-A, ARMv8.2-A, ARMv8.3-A, ARMv8.4-A, ARMv8.5-A, ARMv8.6-A, ARMv8.7-A, ARMv8.8-A, ARMv8.9-A, ARMv9.0-A, ARMv9.1-A, ARMv9.2-A, ARMv9.3-A, ARMv9.4-A, ARMv9.5-A, ARMv9.6-A
Encoding	AArch64/A64 and AArch32/A32 use 32-bit instructions, AArch32/T32 (Thumb-2) uses mixed 16- and 32-bit instructions
Endianness	Bi (little as default)
Extensions	SVE, SVE2, SME, AES, SM3, SM4, SHA, CRC32, RNDR, TME; All mandatory: Thumb-2, Neon, VFPv4-D16, VFPv4; obsolete: Jazelle
Registers
General-purpose	31 × 64-bit integer registers
Floating point	32 × 128-bit registers for scalar 32- and 64-bit FP or SIMD FP or integer; or cryptography

AArch64 or ARM64 is the 64-bit execution state of the ARM architecture family. It was first introduced with the Armv8-A architecture, and has had many extension updates.^[2]

^ ^a ^b ^c Cite error: The named reference v8arch was invoked but never defined (see the help page).
^ "Overview". Learn the architecture: Understanding the Armv8.x and Armv9.x extensions.

[v8arch-1] Cite error: The named reference v8arch was invoked but never defined (see the help page).

[2] "Overview". Learn the architecture: Understanding the Armv8.x and Armv9.x extensions.

[1]

[2]

Registers

Introduced	2011; 14 years ago (2011)
Version	ARMv8-R, ARMv8-A, ARMv8.1-A, ARMv8.2-A, ARMv8.3-A, ARMv8.4-A, ARMv8.5-A, ARMv8.6-A, ARMv8.7-A, ARMv8.8-A, ARMv8.9-A, ARMv9.0-A, ARMv9.1-A, ARMv9.2-A, ARMv9.3-A, ARMv9.4-A, ARMv9.5-A, ARMv9.6-A
Encoding	AArch64/A64 and AArch32/A32 use 32-bit instructions, AArch32/T32 (Thumb-2) uses mixed 16- and 32-bit instructions^[1]
Endianness	Bi (little as default)
Extensions	SVE, SVE2, SME, AES, SM3, SM4, SHA, CRC32, RNDR, TME; All mandatory: Thumb-2, Neon, VFPv4-D16, VFPv4; obsolete: Jazelle
General-purpose	31 × 64-bit integer registers^[1]
Floating point	32 × 128-bit registers^[1] for scalar 32- and 64-bit FP or SIMD FP or integer; or cryptography