Digital filter

A general finite impulse response filter with n stages, each with an independent delay, di, and amplification gain, ai.

In signal processing, a digital filter is a system that performs mathematical operations on a sampled, discrete-time signal to reduce or enhance certain aspects of that signal. This is in contrast to the other major type of electronic filter, the analog filter, which is typically an electronic circuit operating on continuous-time analog signals.

A digital filter system usually consists of an analog-to-digital converter (ADC) to sample the input signal, followed by a microprocessor and some peripheral components such as memory to store data and filter coefficients etc. Program Instructions (software) running on the microprocessor implement the digital filter by performing the necessary mathematical operations on the numbers received from the ADC. In some high performance applications, an FPGA or ASIC is used instead of a general purpose microprocessor, or a specialized digital signal processor (DSP) with specific paralleled architecture for expediting operations such as filtering.[1][2]

Digital filters may be more expensive than an equivalent analog filter due to their increased complexity, but they make practical many designs that are impractical or impossible as analog filters. Digital filters can often be made very high order, and are often finite impulse response filters, which allows for linear phase response. When used in the context of real-time analog systems, digital filters sometimes have problematic latency (the difference in time between the input and the response) due to the associated analog-to-digital and digital-to-analog conversions and anti-aliasing filters, or due to other delays in their implementation.

Digital filters are commonplace and an essential element of everyday electronics such as radios, cellphones, and AV receivers.

  1. ^ Lyakhov, Pavel; Valueva, Maria; Valuev, Georgii; Nagornov, Nikolai (2020). "High-Performance Digital Filtering on Truncated Multiply-Accumulate Units in the Residue Number System". IEEE Access. 8: 209181–209190. Bibcode:2020IEEEA...8t9181L. doi:10.1109/ACCESS.2020.3038496. ISSN 2169-3536.
  2. ^ Priya, P; Ashok, S (April 2018). "IIR Digital Filter Design Using Xilinx System Generator for FPGA Implementation". 2018 International Conference on Communication and Signal Processing (ICCSP). pp. 0054–0057. doi:10.1109/ICCSP.2018.8524520. ISBN 978-1-5386-3521-6. S2CID 53284942.

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