Multi-project wafer service

Multi-project chip (MPC), and multi-project wafer (MPW) semiconductor manufacturing arrangements allow customers to share tooling (like mask) and microelectronics wafer fabrication cost between several designs or projects.

MPC consisting of five CMOS IC designs and few test N- and PMOS transistors for manufacturing acceptance

With the MPC arrangement, one chip is a combination of several designs and this combined chip is then repeated all over the wafer during the manufacturing. MPC arrangement produces typically roughly equal number of chip designs per wafer.

A wafer consisting of MPC designs all over the wafer and five process control monitor (PCM) designs for ensuring good quality of the processing

With the MPW arrangement, different chip designs are aggregated on a wafer, with perhaps a different number of designs/projects per wafer. This is made possible with novel mask making and exposure systems in photolithography during IC manufacturing. MPW builds upon the older MPC procedures and enables more effective support for different phases and needs of manufacturing volumes of different designs/projects. MPW arrangement support education, research of new circuit architectures and structures, prototyping and even small volume production.[1][2]

A multi-project wafer consisting of several different unequal number of designs/projects.

Worldwide, several MPW services are available from companies, semiconductor foundries and from government-supported institutions. Originally both MPC and MPW arrangements were introduced for integrated circuit (IC) education and research; some MPC/MPW services/gateways are aimed for non-commercial use only. Currently MPC/MPW services are effectively used for system on a chip integration. Selecting the right service platform at the prototyping phase ensures gradual scaling up production via MPW services taking into account the rules of the selected service.

MPC/MPW arrangements have also been applied to microelectromechanical systems (MEMS),[3] integrated photonics[4] like silicon photonics fabrication, flexible electronics, microfluidics and even chiplets.[5][6]

A refinement of MPW is multi-layer mask (MLM) arrangement, where a limited number of masks (e.g. 4) are changed during manufacturing at exposure phase. The rest of the masks are the same from the chip to chip on the whole wafer.[7] MLM approach is well suited for several specific cases:

  • Large (even possibly part or whole wafer) designs like detectors, where by using few mask layers it is possible to form functional devices
  • Making different versions of one design/project like for different performance or standards of one design

Typically MLM approach is used for one wafer batch (consisting of several wafers depending on the fabrication line) and for one customer. By using MLM it is possible to get larger devices (even up to wafer size) or larger number of dies and wafers up to few batches typically. MLM is a smooth continuation from MPW production volumes upwards and therefore this may support also small/mid size volume production. Not all foundries support MLM arrangements.

Due to the complexity of the technologies available and the need to run MPC/MPWs smoothly, following the rules, timing of the designs and use of suggested design tools are critical for leveraging the benefits of MPC/MPW services. However every service provider has its own practicalities including design data, die sizes, design rules, device models, design tools used, ready IP blocks available and timing etc.

Turn around times and cost of MPC and MPW services depend on the manufacturing technology and designs/prototypes are typically available as bare dies or as packaged devices. Deliveries are typically untested, but in most of the cases the quality of the manufacturing process is guaranteed by the measurement results of process control monitor(s) (PCM) or similar.

MPC approach was one of the first hardware service platforms in semiconductor industry, and the more flexible MPW arrangement is continuing to be part of well established microelectronics manufacturing and foundry model not limited to silicon IC manufacturing but spreading into other semiconductor production areas for cost effective prototyping, development and research.

  1. ^ Wu, M.-C.; Lin, R.-B. (2005). "Multiple Project Wafers for Medium-Volume IC Production". 2005 IEEE International Symposium on Circuits and Systems. pp. 4725–4728. doi:10.1109/ISCAS.2005.1465688. ISBN 0-7803-8834-8. S2CID 16510670.
  2. ^ Noonan, J. A. (1986). "Investigation into methods and analysis of computer aided design of VLSI circuits". Master Thesis, the Department of Electrical and Electronic Engineering, the University of Adelaide.
  3. ^ "EUROPRACTICE MEMS MPW".
  4. ^ "MPW". SMART Photonics.
  5. ^ "An integrated modular service for microfluidics, μBUILDER program".
  6. ^ Grinde, C.; Welham, C. (2008). "μBUILDER: The easy and low cost road to advanced microsystems". 2008 15th IEEE International Conference on Electronics, Circuits and Systems. pp. 17–18. doi:10.1109/ICECS.2008.4675128. ISBN 978-1-4244-2181-7.
  7. ^ Pann, P. (2009). "Prototyping and testing of analog integrated circuits". Proceedings - 1st Asia Symposium on Quality Electronic Design: 173–177. doi:10.1109/ASQED.2009.5206277. S2CID 2987670.

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